-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Feb  1 03:52:58 2024 UTC
-- File 20231027_222536_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T22:25:39.000.000.000 to 2023-10-27T22:25:39.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_222536_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0211FAC0 031907A0 004AC230 0237D190 02961CA0 00EE8970 0099CDC0 00D52B20 02BFBEB0 03E061E0 00105110
      00105110 02187990 01144550 039E67F0 02515400 01BCFF00 00B14040 00E9E060 029D1050 01D39870 013A5440
      013A5440 01A77E60 0374C150 00CEA1F0 00A9F100 00FD0980 0041C6A0 013092F0 01A8DB80 017CB640 01C2ED60
      01C2ED60 03239BD0 00B25630 00EB7D20 029EC3B0 03D1A260 00397350 0112E570 00CDCBE0 02AB2E10 01FEB910
      01FEB910 0301E590 00811750 02C19CF0 03A15280 0271FBC0 03490620 00ED8530 024DA3D0 00B5B910 02EF6590
      02EF6590 0198D750 0354BCF0 02FEE280 038193C0 02415A20 0161F730 01D10CA0 03398AF0 0152A7C0 02FDFA10
      02FDFA10 01830710 03428490 00E3C6D0 029225B0 03DB3760 0036ACD0 022DFAB0 033B07E0 00A68410 037AE300
      037AE300 0163C940 01D22DE0 033B3B10 00A6A690 02F5F5D0 018F0F30 014888A0 03ECCCF0 021AAA80 0317FFC0
      0317FFC0 034E0010 02748000 034EC000 02E9A000 039D7000 0253C800 037A2C00 02C73A00 03A4A700 0276F480
      0276F480 034D8EC0 0375A4D0
     
