-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 23:51:47 2024 UTC
-- File 20231027_080554_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T08:05:57.000.000.000 to 2023-10-27T08:05:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_080554_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03CF2070 0228B040 033CE860 00A29C50 02F3D270 038A3B40 024F26E0 0168B590 03EE77A0 00194C70 0015EA40
      0015EA40 001F1F60 021090D0 0118D8B0 0194B4E0 035EEE90 00F199D0 02895530 03E6FFD0 000AC010 020FA010
      020FA010 01087010 038C4810 004A6C10 026F5A10 0158F710 03F48C90 000ECAD0 0209AFB0 0386BC30 0322F110
      0322F110 00B38990 02EA4D50 019F6BF0 0150DE00 01F8B100 0104E980 01869D40 0145D3E0 03E73A10 020A5380
      020A5380 0187BD20 034463B0 02E65260 01957B50 035FC6F0 02F02580 03883740 024C2CE0 016A3A90 03DF27D0
      03DF27D0 00185A10 030A3B80 028F2640 03C8B560 002CEFD0 023A9830 0327D420 00B43E30 00EE2120 029931B0
      029931B0 03D5A960 021FBEE0 028830C0 03CC28A0 002A3CF0 003F2280 0020B3C0 0030EA20 02289F30 033CD0A0
      033CD0A0 00A2B8F0 00F3E480 00450B60 0333C760 00AA24D0 02FF36B0 0380ADE0 0040FB10 02608690 0150C5D0
      0150C5D0 03F8A730 0204F4A0 01068EF0 00C2E4C0 0251CB50 01792EF0 01C5B980 01276540 01B4D7E0 036EBC10
      036EBC10 00D9E210 02B51310
     
