-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 23:43:49 2024 UTC
-- File 20231027_074120_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T07:41:23.000.000.000 to 2023-10-27T07:41:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_074120_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01B1CBE0 03692E10 00DDB910 02B36590 01EAD750 018FDE70 00A418A0 017B0A70 00E347A0 0292E470 03DB9640
      03DB9640 02365D60 012D73D0 03BBCA30 02662F20 015538B0 01FFA4E0 03007690 024026E0 02B01AC0 03E817A0
      03E817A0 001C1C70 00121240 001B1B60 021696D0 011DDDB0 01933360 035AAAD0 00F7FFB0 02460030 03B28010
      03B28010 006BC010 025E2010 01713010 03C9A810 002D7C10 023BC210 01262310 03B53290 006FABD0 012C3F10
      012C3F10 03DD1040 02339860 012A5450 03BF7E70 0260C140 0350A1E0 00F8F110 02848990 01C6CD50 0325ABF0
      0325ABF0 015BBF00 00FB3040 0086A860 02C5FC50 01A70270 01748340 01CEC2E0 0329A390 00BD7250 02E3CB70
      02E3CB70 03922EC0 032D9CD0 005DA950 02737DF0 034AC300 02EFA280 039873C0 02544A20 017E6F30 01C158A0
      01C158A0 0321F4F0 02B10E80 01F4C4E0 03875340 0244FAE0 01668790 03D5C450 003F2670 0020B540 0030EFE0
      0030EFE0 02289810 013CD410 03A2BE10 0239F080 01928460 035BC650 00F62570 008D37C0 00CBAC20 02AE7A30
      02AE7A30 03F94720 0005E4B0
     
