-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 23:26:10 2024 UTC
-- File 20231027_065352_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T06:53:55.000.000.000 to 2023-10-27T06:53:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_065352_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00001700 00000E40 00000960 02000DD0 01000B30 01800EA0 034009F0 02E00D00 03900B80 02580E40 03740960
      03740960 026706E0 02AA42C0 03FF63A0 0000D270 0000BB40 0000E6E0 02009590 0100DF50 0380B0F0 0240E880
      0240E880 03609CC0 03686950 006E2EF0 00593980 0075A540 004F77E0 0268CC10 015CAA10 03F2FF10 000B8090
      000B8090 020E40D0 010960B0 02C6E870 01D2CE20 033BA930 02A67DA0 01F54370 010FE2C0 018813A0 034C1A70
      034C1A70 02EA1740 039F1CE0 00509290 033C6DE0 02512D80 0379BB40 02C566E0 01A7D590 03743F50 00CE20F0
      00CE20F0 00A93080 00FDA8C0 00837CA0 02C2C2F0 01D1D1C0 029C9C90 01D2D2D0 033BBBB0 02A66660 01F55550
      01F55550 030FFFF0 02880000 03CC0000 022A0000 033F0000 01504000 00FC3000 00822800 00C33C00 00A2A200
      00A2A200 00F3F300 008A0A80 00CF0FC0 00A88820 02FCCC30 0382AA20 0021FF90 03188020 0094C030 00DEA020
      00DEA020 02B1F030 03E90820 001D8C30 00134A20 021AEF30 031798A0 009C54F0 00693F40 022ED070 0339B840
      0339B840 02A56460 01F7D650
     
