-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 22:26:32 2024 UTC
-- File 20231027_044026_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T04:40:29.000.000.000 to 2023-10-27T04:40:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_044026_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00EDE8E0 029B1C90 01D692D0 033DDBB0 02A33660 01F2AD50 030BFBF0 028E0600 01E48280 0116C3C0 019DA220
      019DA220 03537330 02FACAA0 0187AFF0 01447800 01E64400 01156600 019FD500 00A81FC0 027E0810 01410C10
      01410C10 03E18A10 00114F10 0219E890 01151CD0 039F92B0 02505BE0 01787610 03C44D10 021335C0 038D5790
      038D5790 004BFC50 026E0270 03590340 02F582E0 018F4390 0348E250 00EC9370 009ADAC0 00D7B7A0 015E3630
      015E3630 02F89690 0184DDD0 0346B330 02E5EAA0 01971FF0 015C9000 01F2D800 010BB400 018E6E00 01495900
      01495900 00F6FAC0 0246C3D0 0165A230 01D77320 033CCAB0 02A2AFE0 01F3F810 030A0410 008F0610 02C88510
      02C88510 01ACC790 03BD5220 0031FD90 02290350 013D82F0 01A34380 0172E240 01CB9360 032E5AD0 00B977B0
      00B977B0 00E5CC60 02972A50 00EE5FB0 024CB830 036AE420 00DF9630 00B05D20 02E873B0 039C4A60 00526F50
      00526F50 027B58F0 0346F480 02E58EC0 03CBA4D0 00173B50 021CA6F0 0312F580 029B8F40 03D648E0 003D6C90
      003D6C90 0223DAD0 013237B0
     
