-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 22:20:23 2024 UTC
-- File 20231027_043328_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T04:33:31.000.000.000 to 2023-10-27T04:33:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_043328_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0148F2C0 02F645D0 00C6B390 0352F520 007DC7D0 02432430 0362B620 00D3ED30 00BA1BA0 02E71670 03949D40
      03949D40 025ED3E0 0171BA10 03C96710 0216EA40 038ECFB0 0249A860 016D7C50 03DBC270 02362340 032D32E0
      032D32E0 00BBAB90 02E67E50 01954170 015FE1C0 02F80890 02C20660 01A30550 037287F0 02CBC400 03AE2600
      03AE2600 02793500 0345AF80 02E77840 0394C460 005EA650 0138FAB0 02D243F0 03BB6200 0266D300 0355BA80
      0355BA80 02FF67C0 0380D420 0040BE30 0060E120 025091B0 0378D960 02625AE0 02A9BBC0 03FD6620 0003D530
      0003D530 00023FA0 02032070 0302B040 0283E860 01C21C50 03231270 02B29B40 03F5EB70 01078F60 038448D0
      038448D0 00466CB0 00655AE0 0257F790 017C0C50 03C20A70 02230F40 033288E0 00ABCC90 037F1560 02604FE0
      02604FE0 01506810 03F85C10 00047210 02064B10 01056E90 0387D9D0 00443530 00662FA0 02553870 01BFD220
      01BFD220 01B01D90 03681350 00DC1AF0 00B21780 00EB1C40 009E9260 02D1DB50 01B936F0 0165AD80 01D77B40
      01D77B40 029E6370 01E8A960
     
