-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 20:30:35 2024 UTC
-- File 20231026_233225_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T23:32:28.000.000.000 to 2023-10-26T23:32:28.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_233225_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01E629F0 01153D00 019FA380 01507240 01F84B60 03046ED0 008659B0 00C57560 02A7CFD0 01F42830 010E3C20
      010E3C20 03892230 024DB320 016B6AB0 02EF6FF0 0398D800 0254B400 037EEE00 02C19900 03A15580 0271FF40
      0271FF40 034900E0 00ED8090 029B40D0 00EB7050 014F6430 01E8D620 031CBD30 0292E3A0 01DB9270 01365B40
      01365B40 01AD76E0 037BCD90 00C62B50 02A53EF0 01FBD0C0 02831C50 01C29270 0123DB40 01B236E0 036B2D90
      036B2D90 00DEBB50 02B1E6F0 03E91580 021D9F40 031350E0 024D7C40 03B5E130 026F11A0 01589970 01F4D5C0
      01F4D5C0 010EBF20 0389E0B0 024D10E0 016B9890 03DE54D0 00317EB0 0214E0F0 018F4840 0148EC60 03EC9A50
      03EC9A50 001AD770 0017BCC0 001C62A0 021253F0 031B7A00 0296C700 03DDA480 0119BB60 03CAB360 002FEAD0
      002FEAD0 02381FB0 03241060 00B61850 02ED1470 039B9E40 02565160 017D79D0 03C3C530 031113D0 004CCD10
      004CCD10 026AAB90 015FFE50 03F00170 020801C0 030C0120 008A01B0 00CF0160 02A881D0 01FCC130 028150D0
      028150D0 00E0FC50 02908270
     
