-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 19:11:12 2024 UTC
-- File 20231026_175701_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T17:57:04.000.000.000 to 2023-10-26T17:57:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_175701_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  023273C0 032B4A20 00BEEF30 00E198A0 029154F0 01ECFF40 028D4070 01E5F020 018B8410 03A72300 0274B280
      0274B280 034EEBC0 02E99E20 019D5130 0153F9A0 03FA0570 020707C0 03048420 0086C630 0262D290 02A9DDE0
      02A9DDE0 01FD3310 0303AA90 00827FD0 02C34030 03A2E020 00739030 004A5820 026F7430 0358CE20 007A5490
      007A5490 0323BF60 00B260D0 02EB50B0 039EF8E0 00518490 027946D0 0145E5B0 01E71760 03149CD0 009ED2B0
      009ED2B0 0268DDF0 01AE5980 01797540 01C5CFE0 03272810 00B4BC10 02EEE210 01999310 03555A90 00FFF7D0
      00FFF7D0 02800C30 03E00510 020803C0 030C0220 008A0330 00CF02A0 02A883F0 03FCC200 0202A300 0303F280
      0303F280 02820BC0 03C30E20 00114490 030CF360 008A8AD0 02CFCFB0 03A82860 007C3C50 02422270 03633340
      03633340 02D2AAE0 01BBFF90 03660050 006A8030 022FE010 01381010 03A41810 00761410 024D1E10 016B9110
      016B9110 03DE5990 00317550 0229CFF0 033D2800 0151DE00 00FC9880 0082D4C0 00C3BEA0 02A261F0 03F35100
      03F35100 020AF980 030F8540
     
