-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 18:45:50 2024 UTC
-- File 20231026_154118_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T15:41:21.000.000.000 to 2023-10-26T15:41:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_154118_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00E9D6D0 029D3DB0 03D3A360 003A72D0 02274BB0 039A7730 032BA650 005F3AB0 023853F0 01923D00 015B2380
      015B2380 01F6B240 010DEB60 038B1ED0 004E91B0 0069D960 025D35D0 0173AF30 01CA78A0 0197A270 00AE39A0
      00AE39A0 02F92570 0385B7C0 02476C20 0164DA30 01D6B720 033DECB0 02A31AE0 01F29790 030BDC50 00471930
      00471930 02324AD0 012B6FB0 01BED860 0361B450 00D16E70 00B9D940 00E535E0 0297AF10 01DC7890 033244D0
      033244D0 0055B350 013FB570 01A06FC0 01705820 03C87430 022C4E20 013A6930 01A75DA0 0374F370 02CE8AC0
      02CE8AC0 03A9CFA0 003E9430 0210EF10 01189890 0394D4D0 005EBEB0 0071E1E0 02491110 016D9990 03DB5550
      03DB5550 0036FFF0 002D8000 001DA000 0009B800 000D6400 000BD600 000E3D00 00092380 000DB240 000B6B60
      000B6B60 020EDED0 0109B1B0 018D6960 03A5EEE0 023B8CC0 03264AA0 00B56FF0 00EFD800 00983400 00D42E00
      00D42E00 00BE3900 00E12580 0091B740 00D96CE0 035AED40 037BCDF0 02C62B00 03A53E80 0277A1C0 034C7120
      034C7120 00EA49B0 009F6D60
     
