-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 18:14:45 2024 UTC
-- File 20231026_135316_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T13:53:19.000.000.000 to 2023-10-26T13:53:19.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_135316_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01996D20 0355DBB0 02FF3660 0180AD50 0340FBF0 02E08600 0390C500 0258A780 0374F440 02CE8E60 01A9C950
      01A9C950 037D2DF0 02C3BB00 01D13340 0139AAE0 03A57F90 0077C050 024C2070 036A3040 02DF2860 01B0BC50
      01B0BC50 0368E270 02DC9340 03D96D70 011AEDE0 03979B10 005C5690 02727DD0 014B4330 01EEE2A0 031993F0
      031993F0 02955A00 03DFF700 02300C80 01940560 03AF03E0 00788210 0244C310 0166A290 03D5F3D0 003F0A30
      003F0A30 00208F20 0230C8B0 0328ACE0 00BCFA90 037143E0 0264F100 03568980 02FDCD40 03832BE0 0042BE10
      0042BE10 0263E110 01521190 03FB1950 000695F0 0005DF00 00039840 02012A30 0301BF20 008160B0 00C1D0E0
      00C1D0E0 02A13890 01F1A4D0 030976B0 028DCDE0 01CB2B10 032EBE90 025CF0E0 02B94440 03E5E660 00171550
      00171550 021C9FF0 0312D000 029BB800 03D66400 023D5600 0323FD00 02B20380 01F58120 0187A0D0 034470B0
      034470B0 02E648E0 01956C90 035FDAD0 00F037B0 00882C60 02CC3A50 01AA2770 017F34C0 02E05750 00C83E70
      00C83E70 00AC2140 00FA31E0
     
