-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 18:13:07 2024 UTC
-- File 20231026_135126_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T13:51:29.000.000.000 to 2023-10-26T13:51:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_135126_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CE48A0 02A96CF0 03FDDA80 020337C0 0302AC20 0083FA30 02610390 01518250 03F94370 0205E2C0 030713A0
      030713A0 00849A70 00C6D740 00A5BCE0 02F76290 018CD3D0 01A55D10 03BBF9C0 02660520 015507B0 01FF8460
      01FF8460 03004650 00806570 00C057C0 00A07C20 02F04230 03886320 00262950 011A9EF0 0197D180 015C3940
      015C3940 01F225E0 030B3710 008EAC90 02C9FAD0 01AD07B0 017B8460 03C64650 0012B2B0 020DF5F0 030B0F00
      030B0F00 028E8880 03C9CCC0 022D2AA0 013BBFF0 01A66000 01755000 01CFF800 01280400 00DE0300 00588140
      00588140 0074C1E0 024EA110 0169F190 03DD0950 00338DF0 002A4B00 003F6E80 0020D9C0 0030B520 011477D0
      011477D0 01CF2610 0328B510 00BCEF90 02E29850 0193D470 015A3E40 01F72160 030CB1D0 008AE930 00CF9DA0
      00CF9DA0 015429B0 02FF1EB0 038091E0 0040D910 0260B590 0150EF50 03F898F0 0204D480 0306BEC0 0285E1A0
      0285E1A0 01C71170 00924CE0 036DB540 02DB6FE0 01B6D810 036DB410 00DB6E10 02B6D910 01EDB590 031B6F50
      031B6F50 0096D8F0 00DDB480
     
