-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 17:28:36 2024 UTC
-- File 20231026_123552_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T12:35:55.000.000.000 to 2023-10-26T12:35:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_123552_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0085D8A0 02C734F0 03A4AE80 0276F9C0 034D8520 00EB47B0 009EE460 02D19650 01B95D70 0165F3C0 01D70A20
      01D70A20 033C8F30 02A2C8A0 00F9D670 00429EA0 0263D1F0 03523900 02FB2580 0386B740 0245ECE0 01671A90
      01671A90 03D497D0 003EDC30 0021B220 0118B590 03CA77A0 002F4C70 0038EA40 00249F60 0236D0D0 012DB8B0
      012DB8B0 01BB64E0 0366D690 00D5BDD0 02BF6330 03F06950 00042EF0 00063980 00052540 0007B7E0 02046C10
      02046C10 01065A10 03857710 0047CC90 02642AD0 01563FB0 02FE9030 03C0EC10 00209A10 0230D710 0128BC90
      0128BC90 03BCE2D0 006293B0 0053DA60 027A3750 01472CF0 01E4BA80 008B73E0 03676500 02D4D780 03BEBC40
      03BEBC40 0261E260 01511350 03F99AF0 02055780 0307FC40 02840260 01C60350 01928170 00ADE0E0 02FB1090
      02FB1090 018698D0 0345D4B0 02E73EE0 0194A190 035EF150 00F189F0 00894D00 00CDEB80 00558F20 013FA450
      013FA450 03A07670 02704D40 03486BE0 00EC5E10 029A7110 01D74990 033CED50 00A29BF0 00F3D600 00451E80
      00451E80 0033C8E0 022A2C90
     
