-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 17:14:56 2024 UTC
-- File 20231026_122028_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T12:20:31.000.000.000 to 2023-10-26T12:20:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_122028_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0310D520 0098BFB0 00D4E060 02BE9050 01E1D870 01113440 0199AE60 03AABCA0 003FF170 002009C0 00300D20
      00300D20 02280BB0 033C0E60 00A20950 02F30DF0 038A8B00 024FCE80 036829C0 036E1E90 026C88E0 015ACC90
      015ACC90 03F7AAD0 000C7FB0 000A4060 020F6050 0108D070 018CB840 014AE460 03EF9650 000C2EB0 02051CF0
      02051CF0 03079280 02845BC0 03C67620 00254D30 0037EBA0 022C1E70 033A1140 02A719E0 01F49510 03876FC0
      03876FC0 03226C10 00B35A10 02EAF710 019F8C90 03504AD0 00F86FB0 00845860 02C67450 01A54E70 0177E940
      0177E940 02E60EF0 01CA84C0 012FC6A0 03B825F0 02643700 03562C80 02FD3AC0 0383A7A0 00427470 00634E40
      00634E40 0052E960 033DCEE0 025194C0 03795EA0 00C5F1F0 00A70900 00F48D80 008ECB40 00C9AEE0 02AD7990
      02AD7990 01FBC550 030627F0 01429A00 00F1EB80 00891E40 00CD9160 02AB59D0 01FEF530 01018FA0 03814870
      03814870 0241EC40 03611A60 00D19750 015CAE70 00F97CA0 0285C2F0 03C72380 0224B240 0336EB60 00AD9ED0
      00AD9ED0 02FB51B0 0386F960
     
