-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 17:13:10 2024 UTC
-- File 20231026_121908_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T12:19:11.000.000.000 to 2023-10-26T12:19:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_121908_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00597280 0075CBC0 02279710 01345C90 03AE72D0 00794BB0 0045EE60 02671950 015495F0 01FEDF00 0101B080
      0101B080 018168C0 02A0EE50 00F84CB0 00846AE0 02C65F90 01A57050 0377C870 02CC2C40 03AA3A60 007F2750
      007F2750 0240B4F0 0360EE80 01684CE0 03EE3540 02192FE0 0115B810 039F6410 0050D610 0278BD10 0144E390
      0144E390 03E69250 0015DB70 001F36C0 020856D0 00863ED0 02C521B0 03A7B160 007469D0 024E5D30 036973A0
      036973A0 00DDCA70 00B32F40 00EAB8E0 029FE490 02E80B60 02CE0760 01A904D0 037D86B0 02C345E0 01A2E710
      01A2E710 03739490 00CA5ED0 02AF71B0 03F8C960 0004ADD0 01037D90 03C161A0 0021D170 003139C0 0029A520
      0029A520 023D77B0 0323CC60 00B22A50 02EB3F70 039EA0C0 0251F0A0 00BC8470 00716320 0249D2B0 036D3BE0
      036D3BE0 00DBA610 02B67510 01ED4F90 031BE850 00961C70 00DD1240 00B39B60 03752B60 0267DF60 015430D0
      015430D0 03FE28B0 02013CE0 0101A290 038173D0 0041CA30 00612F20 0251B8B0 037964E0 0262EB40 03A9CF70
      03A9CF70 027D28C0 0343BCA0
     
