-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 17:00:25 2024 UTC
-- File 20231026_114124_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T11:41:27.000.000.000 to 2023-10-26T11:41:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_114124_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E98A60 019D4F50 0353E8F0 02FA1C80 038712C0 02449BA0 0166D670 00EADEA0 014FD8F0 00F41A40 02470BB0
      02470BB0 03648E60 00D6C950 02BDADF0 03E37B00 0212C680 031BA5C0 02967720 01DD4CB0 0133EAE0 03D50FC0
      03D50FC0 031FC410 00902610 02D83510 01B42F90 036E3850 00D92470 00B5B640 00EF6D60 0298DBD0 01D4B630
      01D4B630 029F7690 02E866E0 019C5590 03527F50 00FB40F0 0086E080 00C590C0 00A758A0 02F4F4F0 038E8E80
      038E8E80 0249C9C0 03B69690 0236EEE0 012D9990 03BB5550 0066FFF0 00558000 007F4000 0040E000 00609000
      00609000 0050D800 0078B400 00227700 0019A640 00157560 021FCFD0 01102830 01983C20 03542230 02FE3320
      02FE3320 01812AB0 0141BFE0 03E16010 0208E800 01864E00 01456900 01E7DD80 01143340 019E2AE0 03513F90
      03513F90 00F9A050 02857070 03C7C840 02242C60 029B1D20 00EB49D0 029EED30 03D19BA0 00395670 0025FD40
      0025FD40 003703E0 022C8210 013AC310 03A7A290 007473D0 01272510 03DA5BC0 02377620 012CCD30 01BAABA0
      01BAABA0 0367FE70 02D40140
     
