-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 16:46:32 2024 UTC
-- File 20231026_112019_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T11:20:22.000.000.000 to 2023-10-26T11:20:22.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_112019_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02DBB5F0 01DB3780 009B5620 016B7E90 03DEC1D0 0031A130 002971A0 023DC970 03232DC0 02B2BB20 01EBE6B0
      01EBE6B0 011E15E0 03911F10 022CC840 039D5630 0253FD20 017A03B0 01C70260 03248350 00B6C2F0 00EDA380
      00EDA380 009B7240 00D6CB60 02BDAED0 00F1BCD0 0144B150 03E6E9F0 02159D00 031F5380 0290FA40 03D88760
      03D88760 0034C4D0 022EA6B0 0339F5E0 00A50F10 037BC440 03631330 02D29AA0 01BBD7F0 01663C00 01D52200
      01D52200 013FB300 01A06A80 01705FC0 01C87020 032C4830 035D3610 0279D680 03453DC0 02E7A320 019472B0
      019472B0 015E4BE0 03F16E10 0009D910 020D3590 010BAF50 038E78F0 0124A240 02DB79B0 03B6C560 006DA7D0
      006DA7D0 025B7430 0376CE20 00CDA930 00AB7DA0 02FEC370 0381A2C0 024173A0 00B0E530 02744BD0 014E6E30
      014E6E30 01E95920 031DF5B0 02930F60 01DA88D0 0337CCB0 02AC2AE0 01FA3F90 03072050 00425830 0231BA10
      0231BA10 01296710 03BDD490 00633ED0 0252A1B0 037BF160 00C609D0 02A50D30 03F78BA0 000C4E70 000534A0
      000534A0 0103D770 01823CC0
     
