-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 16:20:09 2024 UTC
-- File 20231026_103544_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T10:35:47.000.000.000 to 2023-10-26T10:35:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_103544_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  024A7B00 036F4680 02D8E5C0 03B49720 006EDCB0 022CD970 019D5AE0 03A9FBC0 033E8310 00A1C290 02F123D0
      02F123D0 0189B230 014D6B20 03EBDEB0 021E31E0 01112910 0399BD90 00556350 013FE970 00D00EE0 02B80990
      02B80990 01E40D50 03160BF0 029D0E00 03D38900 023A4D80 03276B40 02B4DEE0 01EEB190 038CF4A0 00254770
      00254770 0037E4C0 002C16A0 023A1DF0 03271300 02B49A80 03EED7C0 0219BC20 01156230 019FD320 01A81D50
      01A81D50 01BE09F0 01610D00 01D18B80 01394E40 01A5E960 03771DD0 00CC9330 00AADAA0 02FFB7F0 03806C00
      03806C00 01202D00 00D81DC0 00B41320 02EE1AB0 039917E0 00559C10 027F5210 0140FB10 03E08690 0010C5D0
      0010C5D0 0218A730 038A7A50 0027A3B0 00347260 022E4B50 01396EF0 01A5D980 01773540 01CCAFE0 032AF810
      032AF810 00BF8410 02E04610 02C83280 01D615E0 033D1F10 00A39090 02F258D0 018B74B0 014ECEE0 03E9A990
      03E9A990 001D7D50 0213C3F0 031A2200 014B9980 00F72AA0 028CBFF0 03CAE000 022F9000 03385800 02A47400
      02A47400 03F64E00 020D6900
     
