-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 15:15:37 2024 UTC
-- File 20231026_090827_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T09:08:30.000.000.000 to 2023-10-26T09:08:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_090827_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02665FB0 03557060 00FFC850 02802C70 03C03A40 02202760 013034D0 01D41750 019F0E70 00A844A0 02FC66F0
      02FC66F0 03825580 02437F40 0362C0E0 00D3A090 02BA70D0 01E748B0 0114ECE0 039E9A90 0228EBE0 029E4F00
      029E4F00 03D16880 0239DCC0 032532A0 00B7ABF0 00EC7E00 009A4100 00D76180 00BCD140 00E2B9E0 0349F280
      0349F280 017685E0 03CDC710 002B2490 023EB6D0 0121EDB0 01B11B60 036996D0 00DD5DB0 00B3F360 02EA0AD0
      02EA0AD0 00CF87D0 01542210 03FE3310 00012A90 0201BFD0 01016030 0181D020 03413830 02E1A420 01917630
      01917630 0159CD20 01FA95D0 0183EF90 03421850 00E31470 00929E40 00DBD160 02B639D0 01ED2530 011BB7A0
      011BB7A0 03966C70 025D5A40 03B9FBB0 03328330 02ABC2A0 01FE23F0 01013200 0181AB00 01417E80 01E1C1C0
      01E1C1C0 01112120 0399B1B0 02556960 02BFEEE0 02F00CC0 03880AA0 004C0FF0 006A0800 005F0C00 00708A00
      00708A00 0048CF00 006CA880 005AFCC0 007782A0 012621F0 00DA9880 00B7D4C0 00EC3EA0 029A21F0 03D73100
      03D73100 023CA980 0322FD40
     
