-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 14:28:20 2024 UTC
-- File 20231026_063217_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T06:32:20.000.000.000 to 2023-10-26T06:32:20.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_063217_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01914D90 0359EB50 00F51EF0 008F9180 00C85940 00AC75E0 02FA4F10 01876890 03A26E60 00735950 024AF5F0
      024AF5F0 036F8F00 02D84880 03B46CC0 026E5AA0 015977F0 01F5CC00 010F2A00 00C45F80 00533820 027AA430
      027AA430 0347F620 00E40D30 00960BA0 02DD0E70 03B38940 026A4DE0 015F6B10 03F0DE90 020458E0 02833A40
      02833A40 03C2A760 0023F4D0 02320EB0 032B09E0 00BE8D10 02E1CB90 01912E50 0359B970 02F565C0 03C7EB90
      03C7EB90 02120F20 011B08B0 01968CE0 035DCA90 00F32FD0 028AB830 03CFE420 00281630 003C1D20 022213B0
      022213B0 03998D30 032AA5D0 00BFF730 00E00CA0 02900AF0 03D80F80 02340840 032E0C60 00B90A50 02E58F70
      02E58F70 039748C0 032E7650 005CA6B0 0072F5E0 024B8F10 016E4890 03D96CD0 0035DAB0 002F37E0 0238AC10
      0238AC10 0124FA10 03B68710 0236E240 0396C9B0 025DAD60 01737BD0 03CAC630 022FA520 013877B0 01A44C60
      01A44C60 03766A50 00CD5F70 00ABF0C0 027F0450 00A04330 00F062A0 028853F0 03CC7A00 022A4700 033F6480
      033F6480 02A0D6C0 03F0BDA0
     
