-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 13:17:36 2024 UTC
-- File 20231026_023241_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T02:32:44.000.000.000 to 2023-10-26T02:32:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_023241_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  032D9CC0 02BB52A0 01E6FBF0 01158600 019F4500 0150E780 01F89440 0104DE60 0386B150 0022F4F0 0019C740
      0019C740 020A9270 0187EDA0 01A20DB0 01730B60 03CA8ED0 002FC9B0 00382D60 02243BD0 01362630 01AD3520
      01AD3520 037BAFB0 02C67860 02D2A220 00DDF990 02B30550 01EA87F0 011FC400 01902600 01583500 01F42F80
      01F42F80 010E3840 01892460 034DB650 0075B6B0 0227B6F0 03346D80 02AE5B40 03F976E0 0005CD90 02072B50
      02072B50 0104BEF0 0186E180 01459140 01E759E0 038A7A80 0127A3E0 03B47210 006E4B10 02596E90 0175D9D0
      0175D9D0 03CF3530 0228AFA0 013CF870 01A28440 0173C660 03E512A0 000BCDF0 000E2B00 00093E80 000DA1C0
      000DA1C0 000B7120 020EC9B0 0309AD60 008D7BD0 02CBC630 03AE2520 003C9BD0 01116B10 0399DE90 005531D0
      005531D0 027FA930 03407DA0 00E04370 009062C0 00D853A0 02B47A70 03EE4740 030CB270 014575A0 03E7CF70
      03E7CF70 021428C0 031E3CA0 009122F0 00D9B380 00B56A40 00EFDF60 029830D0 01D428B0 029F1E70 01E848A0
      01E848A0 031C6CF0 02925A80
     
