-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 31 13:06:44 2024 UTC
-- File 20231026_021952_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-26T02:19:55.000.000.000 to 2023-10-26T02:19:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231026_021952_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00A48B40 00F6CEE0 0346D4C0 0372DF50 0065D870 002B9A20 023E5730 03217CA0 00B1C2F0 00E92380 009DB240
      009DB240 00D36B60 02BADED0 01E7B1B0 01146960 03CF2EE0 02145CC0 031E72A0 00914BF0 00D9EE00 00B51900
      00B51900 00EF9580 00985F40 00D470E0 02BE4890 01E16CD0 0188ED50 01A64DF0 01756B00 01CFDE80 012831C0
      012831C0 01BC2920 03623DB0 02D32360 01BAB2D0 0367EBB0 02D41E60 02DF08A0 00D84670 00B46540 00EE57E0
      00EE57E0 02997C10 01D5C210 033F2310 00A0B290 02F0EBD0 01889E30 014CD120 01F55CD0 0187F950 034405F0
      034405F0 02E60700 03950480 025F86C0 037045A0 00C86770 00AC54C0 00FA7EA0 028741F0 01E27080 0089A460
      0089A460 02CD7650 01ABCD70 017E2BC0 01C13E20 0321A130 02B171A0 01E9C970 011D2DC0 0193BB20 01AD3350
      01AD3350 01BDD570 01633FC0 01D2A020 033BF030 02A60820 01F50C30 010F8A20 03884F30 024C68A0 016A5CF0
      016A5CF0 00EFB940 024C32F0 036A2B80 02DF3E40 03B0A160 0068F1D0 025C8930 0372CDA0 00CBAB70 00AE7EC0
      00AE7EC0 00F941A0 0142F0B0
     
