-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 22:34:34 2024 UTC
-- File 20231016_072338_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-16T07:23:41.000.000.000 to 2023-10-16T07:23:41.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231016_072338_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01DD6710 0333D490 00AA3ED0 02FF21B0 0380B160 0040E9D0 02609D30 0350D3A0 00F8BA70 0084E740 00C694E0
      00C694E0 02A5DE90 01F731D0 01865490 03457ED0 00E7C1B0 00942160 02DE31D0 01B12930 0169BDA0 03DD6370
      03DD6370 0233D2C0 032A3BA0 005F9330 02382D50 01243BF0 01B62600 016D3500 01DBAF80 01367840 01AD4460
      01AD4460 037BE650 00C61570 00A51FC0 027BC810 02A31600 03F29D00 020BD380 030E3A40 02892760 01CDB4D0
      01CDB4D0 032B6EB0 02BED9E0 01E1B510 03116F90 024CEC20 00B54D10 02EFEB90 01981E50 03541170 02FE19C0
      02FE19C0 03811520 00419FB0 00615060 0251F850 01790470 00E2C320 0149D150 03ED39F0 021BA500 03167780
      03167780 029D4C40 03D3EA60 003A1F50 022710F0 03349880 02AED4C0 03FCDF50 00015870 0001F440 00010E60
      00010E60 02018950 01014DF0 0181EB00 01411E80 01E191C0 01115920 0399F5B0 032A87B0 035FE230 02F01320
      02F01320 01881AB0 014C17E0 03EA1C10 001F1210 02109B10 0118D690 0394BDD0 005EE330 0238C950 009256F0
      009256F0 00DB7D80 00B6C340
     
