-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 20:22:09 2024 UTC
-- File 20231016_013251_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-16T01:32:54.000.000.000 to 2023-10-16T01:32:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231016_013251_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03EAA2A0 001FF3F0 00100A00 00180F00 00140880 000F0660 030442A0 004331F0 0062A900 0053FD80 007A0340
      007A0340 004702E0 02648390 0156C250 03FDA370 020372C0 0302CBA0 0041D730 02309E50 0128D170 01BCB9C0
      01BCB9C0 0162E520 03D397B0 023A5C60 01277250 03B4CB70 026EAEC0 0359F9A0 007A82B0 0223E1F0 03321100
      03321100 02AB1980 03FE9540 0201DFE0 01013010 0381A810 00417C10 0261C210 01512310 03FCD940 03015AF0
      03015AF0 0281F780 03C10C40 02218A60 01314F50 03A9E8F0 027D1C80 034392C0 02E25BA0 01937670 00AD66A0
      00AD66A0 017DEAF0 01C31F80 01229040 01B3D860 036A3450 00DF2E70 00B0B940 00E8E5E0 029C9710 01D2DC90
      01D2DC90 039DD960 02299AE0 013D5790 03A3FC50 00720270 004B0340 006E82E0 0259C390 01752250 03CFB370
      03CFB370 02286AC0 039E2FD0 00289C10 023CD210 0122BB10 03B3E690 006A15D0 025F1F30 037090A0 00C8D8F0
      00C8D8F0 00ACB480 00FAEEC0 0243CCD0 00B11550 02E99FF0 039D5000 0253F800 037A0400 02C70600 03A48500
      03A48500 0276C780 034DA440
     
