-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 04:08:30 2024 UTC
-- File 20231013_191552_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T19:15:55.000.000.000 to 2023-10-13T19:15:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_191552_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01F4BCC0 010EE2A0 01C4C9F0 0126AD00 01B5FB80 016F0640 01D88560 0334C7D0 00AEA430 00F9F620 02850D30
      02850D30 03C78BA0 00122730 020D9A50 010B5770 018EFCC0 014982A0 03ED43F0 021BE200 03161300 029D1A80
      029D1A80 03D397C0 023A5C20 0093B910 036D32C0 02DBABA0 01B67E70 016D4140 01DBE1E0 03361110 00AD1990
      00AD1990 02FB9550 01865FF0 01457000 00F3E400 00450B00 00678E80 005449C0 007E6D20 02415BB0 0361F660
      0361F660 00D10D50 02B98BF0 03E54E00 0217E900 018E0EC0 02A484D0 01F6C6B0 010DA5E0 038B7710 004ECC90
      004ECC90 0269AAD0 015D7FB0 01F3C060 030A2050 008F3070 00645420 012B3F10 03BEA090 0061F0D0 025108B0
      025108B0 03798CE0 00C54A90 02A7EFD0 01F41830 010E1420 03891E30 0326C890 025AD660 0177BD50 03CC63F0
      03CC63F0 022A5200 033F7B00 02A0C680 03F0A5C0 0208F720 010C8CB0 018ACAE0 03A7D7C0 033A1E10 00A71110
      00A71110 02F49990 018ED550 0349BFF0 02ED6000 039BD000 02563800 037D2400 02C3B600 01D13680 009CD6E0
      009CD6E0 02D2BD90 01BBE350
     
