-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 02:44:52 2024 UTC
-- File 20231013_173721_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T17:37:24.000.000.000 to 2023-10-13T17:37:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_173721_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  015E5300 01F17A80 0109C7C0 018D2420 034BB630 02EE6D20 01995BB0 0155F660 03FF86A0 000022F0 000019C0
      000019C0 00001520 02001FB0 03001060 00801850 02C01470 03A01E40 02701160 014819D0 03EC1530 030D0FD0
      030D0FD0 0045C410 02672610 0154B510 03FEEF90 00019850 02015470 0301FE40 02810160 01C181D0 03214130
      03214130 0358F0D0 007A4450 02476670 0364D540 02D6BFE0 01BDE010 03631010 00D29810 02BBD410 01E63E10
      01E63E10 03152110 024FD8C0 03B41A50 006E1770 00591CC0 007592A0 024F5BF0 0368F600 02DC8D00 03B2CB80
      03B2CB80 026BAE40 035E7960 0278A2E0 02A279C0 03F34520 000AE7B0 000F9460 02085E50 010C7170 018A49C0
      018A49C0 014F6D20 03E8DBB0 021CB660 028976A0 00E6E6F0 00959580 00DF5F40 00B0F0E0 02E88890 019CCCD0
      019CCCD0 0352AAB0 02FBFFE0 01860010 03450010 0273C000 01A51000 01779800 01CC5400 012A7E00 01BF4100
      01BF4100 0160E180 01D09140 0138D9E0 03A4B510 0076EF90 0326CC20 005AD510 0277BF90 014C6050 03EA5070
      03EA5070 021F7840 0310C460
     
