-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 01:23:00 2024 UTC
-- File 20231013_132854_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T13:28:57.000.000.000 to 2023-10-13T13:28:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_132854_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F3A710 018A7490 03A7A760 023A3A60 029393A0 00ED2D30 009BBBA0 02D66670 03BD5540 0263FFE0 01520010
      01520010 03FB0010 00068010 0205C010 01072010 03C25800 0111BA00 01996700 0155D480 01FF3EC0 0100A1A0
      0100A1A0 0380F170 024089C0 0360CD20 00D0ABB0 00B8FE60 037240A0 0065B070 00576840 007CDC60 0242B250
      0242B250 0163EB70 01D21EC0 013B11A0 03A69970 0275D5C0 034F3F20 00745050 01273C30 01B4A220 036EF330
      036EF330 02D98AA0 01B54FF0 016FE800 01D81C00 01341200 01AE1B00 01791680 00E2CEE0 0349D4C0 02ED3EA0
      02ED3EA0 019BA1F0 01567100 01FD4980 0103ED40 01821BE0 03431610 00E29D10 0293D390 02ED1D20 00CDC9D0
      00CDC9D0 02AB2D30 03FEBBA0 0001E670 00011540 00019FE0 02015010 0101F810 03810410 00418610 0330A280
      0330A280 015479E0 03FE4510 00016790 0201D450 01013E70 0181A140 014171E0 03E1C910 00112D90 0219BB50
      0219BB50 008AB370 0067F560 02540FD0 017E0830 01C10C20 03218A30 02B14F20 01E9E8B0 011D1CE0 03939290
      03939290 005A5BD0 013BBB10
     
