-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 00:57:24 2024 UTC
-- File 20231013_130908_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T13:09:11.000.000.000 to 2023-10-13T13:09:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_130908_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  016348F0 01D2EC80 013B9AC0 01A657A0 03757C70 02CFC240 03A82360 007C32D0 02422BB0 03B19F30 0334A850
      0334A850 00AEFC70 00F98240 00854360 02C7E2D0 01A413B0 01761A60 03CD1750 002B9CF0 003E5280 0010BDE0
      0010BDE0 030C7180 028A4940 03CF6DE0 0028DB10 023CB690 0122EDD0 03B39B30 026A56A0 015F7DF0 01F0C300
      01F0C300 00845140 02633CF0 0352A280 02FBF3C0 03860A20 00450F30 006788A0 02544CF0 037E6A80 02C15FC0
      02C15FC0 03A1F020 00388410 03126300 029B5280 03D6FBC0 023D8620 01234530 01B2E7A0 036B9470 02DE5E40
      02DE5E40 03B17160 0069C9D0 012E9690 03DCEEE0 00329990 022BD550 013E3FF0 01A12000 0171B000 01C96800
      01C96800 012DDC00 01BB3200 0166AB00 00EAFF40 024FC070 03682040 02DC3060 01B22850 036B3C70 02DEA240
      02DEA240 03B1F360 00690AD0 025D8FB0 03734860 02657620 00ABE690 02FE15D0 01811F30 014190A0 03E158F0
      03E158F0 0211F480 03190EC0 029589A0 01DF4D70 0130EBC0 02D44F10 02DF3440 03B0AE60 0068F950 025C85F0
      025C85F0 0372C700 02CBA480
     
