-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 27 00:26:18 2024 UTC
-- File 20231013_121343_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T12:13:46.000.000.000 to 2023-10-13T12:13:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_121343_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0115E990 039F1D50 005093F0 0078DA00 0044B700 0066EC80 00559AC0 007F57A0 0240FC70 03608240 02D0C360
      02D0C360 01B8A2D0 0364F3B0 02D68A60 01BDCF50 036328F0 01695E40 01DDF160 033309D0 00AA8D30 00FFCBA0
      00FFCBA0 02802E70 03C03940 022025E0 01303710 03A82C90 023E1D60 029089E0 01D8CD10 0334AB90 00AEFE50
      00AEFE50 02F98170 038541C0 0247E120 016411B0 01D61960 033D15D0 0051CF90 033C9420 00A2DE30 00F3B120
      00F3B120 028A69B0 03CF5D60 0028F3D0 023C8A30 0322CF20 00B3A8B0 00EA7CE0 034FA140 037438F0 02CE2480
      02CE2480 03A936C0 027DADA0 01437B70 01E2C6C0 0113A5A0 039A7770 02574CC0 037CEAA0 00614FF0 0028F400
      0028F400 003C8E00 0022C900 0033AD80 002A7B40 003F46E0 0220E590 01309750 03A8DCF0 027CB280 01A175E0
      01A175E0 03B8E780 02649440 0356DE60 00FDB150 028369F0 03C2DD00 0223B380 03326A40 02AB5F60 01FEF0D0
      01FEF0D0 0180C450 01A05330 01707AA0 03C847F0 022C6400 033A5600 02A77D00 03F4C380 020EA240 0309F360
      0309F360 008D0AD0 0165C7D0
     
