-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jan 26 21:07:40 2024 UTC
-- File 20231013_072051_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T07:20:54.000.000.000 to 2023-10-13T07:20:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_072051_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02B762C0 03ECD3A0 001ABA70 0017E740 001C14E0 02121E90 011B11D0 03969930 025DD5A0 01733F70 01CAA0C0
      01CAA0C0 012FF0A0 03B808F0 02640C80 03560AC0 037E87D0 0060E210 02509310 0178DA90 03C4B7D0 0026EC30
      0026EC30 00359A20 022F5730 0338FCA0 00A482F0 00F6C380 0046D120 0132DCD0 03ABB2B0 027E6BE0 01415E10
      01415E10 03E1F110 00110990 02198D50 01154BF0 019FEE00 01501900 00FC0AC0 024107D0 01618430 01D14620
      01D14620 0339E530 02A517A0 01F79C70 010C5240 018A7B60 034F46D0 00E8E5B0 024E4BB0 03B4B730 026EECA0
      026EECA0 01599AF0 01F55780 010FFC40 01880260 034C0350 00EA02F0 009F0380 00D08240 025C61B0 03B928B0
      03B928B0 0265BCE0 01576290 03FCD3D0 0002BA30 0003E720 020214B0 03031EE0 00829190 02C3D950 00D11AF0
      00D11AF0 005CCBC0 0072AE20 024BF930 036E05A0 00D90770 00B584C0 00EF46A0 0298E5F0 03D49700 023EDC80
      023EDC80 0190D960 03AC5AE0 007A7790 02474C50 0164EA70 01D69F40 013DD0E0 03A33890 0072A4D0 024BF6B0
      024BF6B0 036E0DE0 026C8580
     
