-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jan 26 21:05:49 2024 UTC
-- File 20231013_071920_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T07:19:23.000.000.000 to 2023-10-13T07:19:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_071920_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  016CCE10 03DAA910 0037FD90 022C0350 013A02F0 01A70380 01748240 01CEC360 0329A2D0 005EB9D0 0138F290
      0138F290 03D245E0 021DB380 03136A40 029ADF60 01D7B0D0 033C68B0 02A25CE0 01F37290 030ACBD0 008FAE30
      008FAE30 00C87920 015622D0 01FE99D0 0301D530 02813FA0 01C1A070 01217040 01B1C860 03692C50 00DDBA70
      00DDBA70 00B36740 00EAD4E0 034FDF40 03741870 02CE1440 03A91E60 007D9150 024359F0 0362F500 02D38F80
      02D38F80 03BA4840 02676C60 0154DA50 01FF5BB0 02807B30 03C046A0 002065F0 00305700 00287C80 003C42C0
      003C42C0 002263A0 02335270 032AFB40 02BF86E0 02F022C0 03C419D0 00261530 00351FA0 022F9070 03385840
      03385840 02A47460 01F64E50 030D6970 028BDDC0 03CE3320 00149550 010F6FF0 0188D800 014CB400 01EAEE00
      01EAEE00 011F9900 01905580 01587F40 01F440E0 030E6090 008950D0 0166FC50 01EAC130 011FA1A0 03907170
      03907170 025849C0 03746D20 00CE5BB0 00A97660 02FDCD50 01832BF0 0142BE00 00F1F080 00448460 0266C650
      0266C650 0155A570 01FF77C0
     
