-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jan 26 18:40:52 2024 UTC
-- File 20231013_030541_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T03:05:44.000.000.000 to 2023-10-13T03:05:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_030541_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00D1D700 00B93C80 00E5A2C0 024BB9D0 00B73290 037655E0 0266BF80 0355E040 02FF1060 01809850 0340D470
      0340D470 02E0BE40 0390E160 005891D0 0274D930 034EB5A0 0074F7B0 02274630 0334E520 00AE97B0 00F9DC60
      00F9DC60 02853250 01C7AB70 01247EC0 01B641A0 036D6170 02DBD1C0 03DB1C90 021B4960 0116EDD0 039D9B30
      039D9B30 025356A0 017AFDF0 01C78300 01244280 01B663C0 016D5220 03DBFB30 031B0350 004B4170 006EE1C0
      006EE1C0 00599120 027559B0 034FF560 00E80FD0 029C0830 03D20C20 003B0A30 00268F20 011AE450 01CBCB30
      01CBCB30 012E2EA0 03B939F0 0265A500 03577780 02FCCC40 0382AA60 0043FF50 026200F0 03530080 017D4060
      017D4060 03E1F020 00110830 00198C20 02154A30 031FEF20 009018B0 00D814E0 02B41E90 01EE11D0 03191930
      03191930 034ACAD0 0077D7D0 024C3C30 036A2220 00DF3330 00B0AAA0 02E8FFF0 039C8000 0252C000 037BA000
      037BA000 02C67000 01D2A400 009DFB00 00D30680 00BA85C0 00E7C720 029424B0 03DE36E0 00312D90 0229BB50
      0229BB50 013D66F0 01A3D580
     
