-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jan 26 16:47:35 2024 UTC
-- File 20231013_010537_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-13T01:05:40.000.000.000 to 2023-10-13T01:05:40.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231013_010537_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03085770 028C7CC0 03CA42A0 002F63F0 0038D200 0024BB00 0036E680 002D95C0 003B5F20 0226F0B0 033588E0
      033588E0 00AF4C90 02F8EAD0 01849FB0 0146D060 03F2DC20 000BB230 000E6B20 02095EB0 030DF1E0 008B0910
      008B0910 02CE8D90 01A9CB50 037D2EF0 02C3B980 01D132A0 019CD5F0 0152BF00 01FBE080 010610C0 018518A0
      018518A0 034794F0 02E45E80 039671C0 025D4920 0173EDB0 02E50DB0 03CBC5B0 022E2760 013934D0 03A5AEB0
      03A5AEB0 027779E0 014CC510 03EAA790 001FF450 02100E70 03180940 034A06F0 017782C0 01CC43A0 032A6270
      032A6270 02BF5340 03E0FAE0 00108790 0218C450 0114A670 019EF540 01518FE0 03FCA400 01017B00 0181C680
      0181C680 014125C0 01E1B720 03116CB0 0299DAE0 01D53790 033FAC50 00A07A70 00F04740 02443270 01B315A0
      01B315A0 036A9F70 02DFD0C0 03B038A0 006824F0 005C3680 00722DC0 004B3B20 026EA6B0 0359F5E0 027A8780
      027A8780 01A3E220 03721330 02CB1AA0 01AE97F0 0179DC00 01C53200 0127AB00 01B47E80 016E41C0 01D96120
      01D96120 019AE8D0 01ABCE50
     
