-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 24 19:28:22 2024 UTC
-- File 20231010_044128_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-10T04:41:31.000.000.000 to 2023-10-10T04:41:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231010_044128_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00EE3E60 02992150 01D5B1F0 013F6900 01A0DD80 0170B340 01C8EAE0 032C9F90 025D6820 0173DC30 01CA3220
      01CA3220 032F2B30 02B8BEA0 01E4E1F0 01169100 019DD980 01533540 01FAAFE0 0383FC00 01210100 01B18180
      01B18180 01694140 01DDE1E0 03331110 00AA9990 02FFD550 01803FF0 01402000 01E03000 00881400 00660F00
      00660F00 00550880 007F8CC0 00404AA0 02606FF0 03505800 02F87400 03844E00 02466900 03655D80 016BF9A0
      016BF9A0 01EF02B0 011883E0 0394C210 005EA310 0271F290 01490BD0 03ED8E30 021B4920 0116EDB0 019D9B60
      019D9B60 03A9AB60 023EBF60 0121E0D0 03B110B0 026998E0 015D5490 03F3FED0 000A01B0 000F0160 020881D0
      020881D0 010CC130 02C550D0 00D3FC50 02BA0270 03E70340 021482E0 011EC390 0391A250 00597370 0075CAC0
      0075CAC0 004F2FA0 0268B870 01AE7220 01BCA590 0362F750 00D38CF0 00BA4A80 00E76FC0 0094D820 02DEB430
      02DEB430 03B1EE20 00691930 005D95A0 0139AFB0 02D2BC30 03BBE220 00661330 00551AA0 027F97F0 03405C00
      03405C00 02E07200 03904B00
     
