-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 24 18:29:51 2024 UTC
-- File 20231010_022553_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-10T02:25:56.000.000.000 to 2023-10-10T02:25:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231010_022553_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0275C600 01A79280 00BA2DE0 02E73B10 0194A690 035EF5D0 00F18F30 008948A0 02CDECF0 03AB1A80 027E97C0
      027E97C0 0341DC20 00709910 03246AC0 02B65FA0 01ED7070 011BC840 01962C60 035D3A50 00F3A770 008A74C0
      008A74C0 00CF4EA0 02A8E9F0 01FE4E80 0080B4E0 02C0EE90 01A099D0 0370D530 02C8BFA0 01ACE070 017A9040
      017A9040 01C7D860 03243450 00B62E70 00769CA0 0126E970 01B59DC0 016F5320 03D8FAB0 023487E0 012EC410
      012EC410 03B9A610 00657510 0257CF90 017C2850 01E11E30 0288C890 01CCACD0 032AFAB0 02BF87E0 01E04410
      01E04410 03106610 00985510 02D47F90 01BE4050 03616070 0168E820 01EE4E10 03196910 0095DD90 02DF3350
      02DF3350 01B0AAF0 0168FF80 01DC8040 0132C060 03ABA050 007E7070 0020A420 01187B10 03944690 005E65D0
      005E65D0 02715730 0349FCA0 00ED02F0 009B8380 00D64240 00BD6360 02E3D2D0 00C91DD0 0156C990 03FDAD50
      03FDAD50 00037BF0 0002C600 0003A500 00027780 00034C40 0002EA60 02039F50 010250F0 00C1BC40 0250B130
      0250B130 0378E9A0 00C49D70
     
