-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 24 17:42:55 2024 UTC
-- File 20231010_012425_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-10T01:24:28.000.000.000 to 2023-10-10T01:24:28.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231010_012425_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029E06F0 01E882C0 011CC3A0 0392A270 025BF340 03760AE0 00CD0F90 02AB8850 01FE4C70 01016A40 0181DF60
      0181DF60 03A09860 02386A20 01245F30 01B670A0 036D48F0 02DBEC80 03B61AC0 026D17A0 015B9C70 01F65240
      01F65240 010D7B60 03C5E360 02138960 011A4DD0 03976B30 025CDEA0 0172B1F0 01CBE900 012E1D80 01B91340
      01B91340 01659AE0 03D75790 021E7E20 0088A090 02CCF0D0 01AA88B0 017FCCE0 03C02A90 00203FD0 02302030
      02302030 03283020 00BC2830 00E23C20 01499110 03F6ACC0 020DFAA0 010B07F0 018E8400 0149C600 01ED2500
      01ED2500 011BB780 01966C40 015D5A60 03F3F750 00050670 0003C2A0 020223F0 03033200 0282AB00 03C3FE80
      03C3FE80 022201C0 03330120 00AA81B0 00FFC160 028021D0 00E01890 03480A60 00EC0F50 029A08F0 03D70C80
      03D70C80 023C8AC0 0322CFA0 00B3A870 00EA7C40 009F4260 02D0E350 00DC4970 005936E0 0275AD90 014F7B50
      014F7B50 03E8C6F0 021CA580 0312F740 029B8CE0 01D64A90 033D6FD0 00A3D830 02791A10 02A2CB80 03F3AE40
      03F3AE40 020A7960 010F45D0
     
