-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 23 15:40:18 2024 UTC
-- File 20231008_022643_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-08T02:26:46.000.000.000 to 2023-10-08T02:26:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231008_022643_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03AE9E70 0279D140 034539E0 00E7A510 034A3BC0 03779310 02662D40 03AA9DF0 013FE980 01A01D40 017013E0
      017013E0 03C81A10 002C1710 023A1C90 012712D0 03B49BB0 026ED660 0159BD50 01FAB1F0 0083F480 00C20EC0
      00C20EC0 00A309A0 02F28D70 038BCBC0 024E2E20 01693930 01DDA5A0 03337770 02AACCC0 03FFD550 00001FF0
      00001FF0 00001000 00001800 00001400 00001E00 00001100 00001980 00001540 00001FE0 02001010 02800C00
      02800C00 01E00500 01100780 01980440 01540660 03FE0550 000107F0 00018400 00014600 0001E500 00011780
      00011780 0000CE20 01005490 03807ED0 004041B0 00606160 025051D0 01787930 01C445A0 03266770 02B554C0
      02B554C0 03EFFEA0 000C00F0 00050040 00078060 02044050 01066070 01855040 0147F860 03E40450 00160670
      00160670 001D0540 001387E0 030D2200 0145D980 01E73540 0114AFE0 039EF810 00518410 02794610 0145E510
      0145E510 03E71790 00149C50 021ED270 0188DDA0 01A659B0 01757560 03CFCFD0 00282830 003C3C20 02222230
      02222230 03333320 00AAAAB0
     
