-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan 23 12:21:05 2024 UTC
-- File 20231007_202753_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-07T20:27:56.000.000.000 to 2023-10-07T20:27:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231007_202753_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03EE6F10 00195890 030AFA60 0247C3A0 00B21130 02758CD0 00A7A550 02F477F0 038E4C00 02496A00 036DDF00
      036DDF00 02DB3080 03B6A8C0 026DFCA0 015B02F0 01F68380 0086E120 0162C8D0 03D3ACB0 023A7AE0 01274790
      01274790 03B4E450 006E9670 0059DD40 007533E0 024FAA10 01687F10 03EE2040 030C9830 028AD420 01CFBE30
      01CFBE30 01286120 03BC51B0 02627960 015345D0 03FAE730 020794A0 01045EF0 00C338C0 02515250 0179FB70
      0179FB70 01C506C0 012785A0 03B44770 026E64C0 035956A0 00F5FDF0 008F0300 00C88280 005661E0 033EA880
      033EA880 02A1FCC0 03F102A0 000983F0 000D4200 000BE300 000E1280 00091BC0 000D9620 020B5D30 038779D0
      038779D0 00226290 023353D0 012AFA30 01BF8720 036044B0 02D066E0 01B85590 03647F50 00D640F0 00BD6080
      00BD6080 0071E860 03248E20 00B6C930 00EDADA0 029B7B70 03D6C6C0 023DA5A0 01237770 01B2CCC0 016BAAA0
      016BAAA0 03DE7FF0 0118A000 00CA7800 00AF4400 00F8E600 00849500 00C6DF80 00A5B040 00F76860 028CDC50
      028CDC50 01CAB270 012FEB40
     
