-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Jan 20 21:20:06 2024 UTC
-- File 20231002_120944_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-02T12:09:47.000.000.000 to 2023-10-02T12:09:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231002_120944_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02DAA080 03B7F0C0 026C08A0 015A0CF0 01F70A80 008647E0 0362B200 0169F580 00EE87A0 014CE230 01EA9320
      01EA9320 031FDAB0 029037E0 01D82C10 03343A10 00AE2710 02F93490 0185AED0 034779B0 037262B0 0365A9F0
      0365A9F0 02D77D00 03BCC380 0262A240 0353F360 00FA0AD0 02870FB0 03C48860 0026CC50 0235AA70 0197BFA0
      0197BFA0 01AE3030 01792820 03C5BC30 02276220 0134D330 01AEBAA0 0379E7F0 02C51400 03A79E00 02745100
      02745100 01A73CC0 02BA5150 01E779F0 0114C500 019EA780 0151F440 01F90E60 03058950 00874DF0 00C4EB00
      00C4EB00 00A69E80 007AE8E0 0323CE40 02B22960 01EB3DD0 031EA330 0291F2A0 01D90BF0 01358E00 01AF4900
      01AF4900 0178ED80 01C49B40 02936B70 01ED6F60 031BD8D0 009634B0 00DD2EE0 02B3B990 01EA6550 031F57F0
      031F57F0 0290FC00 03D88200 0234C300 01975140 02AE7CF0 03F94280 0205E3C0 03071220 00849B30 00C6D6A0
      00C6D6A0 02A5BDF0 03F76300 020CD280 030ABBC0 0347F310 02720540 034B07E0 00EE8410 0299C610 01D52510
      01D52510 033FB790 00A06C50
     
