-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jan 17 06:12:30 2024 UTC
-- File 20230914_032109_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-09-14T03:21:12.000.000.000 to 2023-09-14T03:21:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230914_032109_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02513FD0 0179A030 01C57020 0327C830 035A1610 027B8E80 01A324E0 03B95B40 0265F6E0 01570D90 03FC8B50
      03FC8B50 0002CEF0 0003A980 00027D40 000343E0 0202E210 01039310 03C12D40 0310DDF0 0298B300 03D4EA80
      03D4EA80 023E9FC0 0321D020 00B13830 00E9A420 029D7630 03D3CD20 003A2BB0 02139F30 038D2850 004BBC70
      004BBC70 006E6240 00595360 0275FAD0 014F07B0 01E88460 031CC650 0092A570 00DBF7C0 025B0610 02BB4280
      02BB4280 03E6E3C0 02159220 011F5B30 0190F6A0 03588DF0 02F4CB00 038EAE80 0249F9C0 036D0520 006DC3D0
      006DC3D0 012D9110 03BB5990 0066F550 02558FF0 037F4800 02C0EC00 03A09A00 0270D700 0348BC80 02ECE2C0
      02ECE2C0 03CD49D0 0015F690 021F0DD0 01108B30 0198CEA0 0354A9F0 02FEFD00 03818380 02414240 0361E360
      0361E360 00D112D0 015CCDD0 01F95590 0305FF50 008700F0 00C48080 00A6C0C0 00F5A0A0 028F70F0 03C8C880
      03C8C880 022CACC0 033AFAA0 0053C3F0 003D1100 00239980 00325540 002B7FE0 023EC010 0121A010 03B17010
      03B17010 0069C810 025D2C10
     
