-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan  9 22:46:46 2024 UTC
-- File 20230722_222504_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-22T22:25:07.000.000.000 to 2023-07-22T22:25:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230722_222504_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  003833F0 00242A00 00363F00 002D2080 003BB0C0 002668A0 02355CF0 032FF280 015C05E0 03F90380 0102C120
      0102C120 01C1D0D0 01909C50 0358D270 02F4BB40 038EE6E0 00499590 026D5F50 015BF0F0 01F60880 010D0CC0
      010D0CC0 018B8AA0 01A727F0 00BA5A00 00E77700 0094CC80 00DEAAC0 00B1FFA0 02E90070 039D8040 02534060
      02534060 017AE050 03C79070 01122C20 01CD9D10 032B5390 00BEFA50 02E18770 039144C0 0259E6A0 017515F0
      017515F0 01CF9F00 01285080 01BC78C0 02B12250 00F4D9B0 008EB560 02C9EFD0 01AD1830 017B9420 03C65E30
      03C65E30 02257120 0137C9B0 01AC2D60 037A3BD0 00639310 03292D40 02BDBBE0 01E36610 0312D510 009BBF90
      009BBF90 02D66050 01BD5070 0163F840 01D20460 033B0650 005342B0 023D71F0 0323C900 02B22D80 03EB3B40
      03EB3B40 021EA6E0 0111F590 03990F50 005588F0 007F4C80 0040EAC0 02304FD0 00943410 02DE2E10 01B13910
      01B13910 0369A590 00DD7750 02B3CCF0 03EA2A80 021F3FC0 0310A020 0098F030 026A4410 02AFB300 03F86A80
      03F86A80 02045FC0 03067020
     
