-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jan  9 22:26:16 2024 UTC
-- File 20230722_213422_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-22T21:34:25.000.000.000 to 2023-07-22T21:34:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230722_213422_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01B0DAD0 0368B7B0 02DCEC60 01B29A50 036BD770 02DE3CC0 03B122A0 0069B3F0 005D6A00 0073DF00 004A3080
      004A3080 006F28C0 0058BCA0 0274E2F0 01A749C0 0174ED20 03CE9BB0 0229D660 013D3D50 03A3A3F0 02727200
      02727200 034B4B00 02EEEE80 039999C0 032AAA90 025FFFE0 01700010 03C80010 002C0010 023A0010 01270010
      01270010 03B48010 006EC010 0259A010 01757010 03E7E400 010A0B00 018F0E80 014889C0 01ECCD20 031AABB0
      031AABB0 0297FE60 01DC0150 033201F0 02AB0100 03FE8180 0100E0A0 01C04870 01206C40 01B05A60 03687750
      03687750 00DC4CF0 00B26A80 00EB5FC0 009EF020 02D18830 03B94C20 0032F510 0315C7C0 029F2420 01D0B630
      01D0B630 0138ED20 03A49BB0 0276D660 014DBD50 03EB63F0 021ED200 0311BB00 014CB340 02F57570 038FCFC0
      038FCFC0 02482820 016C3C30 01DA2220 03373330 02ACAAA0 01FAFFF0 01078000 01844000 00A33000 00795400
      00795400 0045FE00 00670100 00548180 007EC140 0041A1E0 02617110 0151C990 03F92D50 0005BBF0 0003B300
      0003B300 00013540 0001AFE0
     
