-- ERROR --
-----------------> BLESK ver.2021-02-27 run on Mon Jan  8 20:34:32 2024 UTC
-- File 20230722_034023_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-07-22T03:40:30.000.000.000 to 2023-07-22T03:40:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.4544626 to 0.4544626
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      FF -> 136.9 degC in 1 packets (all packets)
Temperature ant 3: 
      1F -> 27.9 degC in 1 packets (all packets)
Temperature ant 4: 
      FF -> -2499.0 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      1 in 1 packets (all packets)
      -> ERROR
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230722_034023_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): ERROR
Configuration check: completeness of CONFHFA (19 bytes)    : ERROR
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 0
Configuration check: number of HFPE/RW intervals (max. 20) : 0

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0367ABE0 00D47E10 02BE4110 01E16190 0311D150 009939F0 00D5A500 00BF7780 00706620 01242A90 03DB1FE0
      03DB1FE0 00369010 022DD810 013B3410 03A6AE10 0075F910 024F0590 01688750 03DCC4F0 0232A680 0195FAE0
      0195FAE0 03AF83C0 02784220 01446330 01E652A0 03157BF0 029FC600 03D02500 02383780 03242C40 02B63A60
      02B63A60 02F693A0 00C6ED30 00A59BA0 02F75670 038CFD40 024A83E0 016FC210 03D82310 00343290 022E2BD0
      022E2BD0 01393E30 02D2D090 02DDDC60 01B33250 036AAB70 02DFFEC0 03B001A0 00680170 005C01C0 00720120
      00720120 024B01B0 036E8160 026CE0E0 02AD4840 03FBEC60 00061A50 02051770 03079CC0 028452A0 01C67BF0
      01C67BF0 01254600 01B7E500 016C1780 00ED0E20 014DC490 03EB26D0 001EB5B0 0011EF60 021918D0 011594B0
      011594B0 019F5EE0 0350F190 00F88950 0284CDF0 01E35580 00897FA0 02CDC070 03AB2040 027EB060 0141E850
      0141E850 03E11C70 02119240 03195B60 0095F6D0 02DF0DB0 03D845B0 031A33B0 02972A60 01DCBF50 0332E0F0
      0332E0F0 02AB9080 03FE58C0
     
