-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jul  7 01:01:50 2023 UTC
-- File 20230628_033031_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-06-28T03:30:34.000.000.000 to 2023-06-28T03:30:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230628_033031_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DF5C60 02B0F250 00F445B0 024733B0 03B25530 0335BFD0 00AF6030 00F8D020 0284B830 03C6E420 00259630
      00259630 00375D20 022CF3B0 033A8A60 00A7CF50 017A1470 00E38F20 029248B0 03DB6CE0 0036DA90 022DB7D0
      022DB7D0 013B6C30 01A6DA20 0375B730 02CF6CA0 01A8DAF0 00BE5BC0 0270BB10 0148E690 03EC95D0 001ADF30
      001ADF30 0017B0A0 021C68F0 03125C80 029B72C0 03D6CBA0 003DAE70 0011BCA0 010CB170 018AE9C0 014F9D20
      014F9D20 03E853B0 021C7A60 01124750 039B64F0 0256D680 037DBDC0 02C36320 00D16950 015CEEF0 01F29980
      01F29980 010BD540 018E3FE0 03492010 00EDB010 029B6810 01D6DC10 033DB210 00A36B10 03796F40 0362EC70
      0362EC70 02D39A40 03BA5760 00677CD0 0254C2B0 037EA3E0 00C1F210 02A10B10 01F18E90 030949D0 0046F690
      0046F690 0332C6E0 00ABA590 02FE7750 01814CF0 0141EA80 01E11FC0 01119020 03995830 0255F420 017F0E30
      017F0E30 02E04490 02C83360 01AC2AD0 037A3FB0 02C72060 01A4B050 0376E870 02CD9C40 03AB5260 007EFB50
      007EFB50 024186F0 01B0A2C0
     
