-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jul  7 00:16:25 2023 UTC
-- File 20230628_015042_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-06-28T01:50:45.000.000.000 to 2023-06-28T01:50:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230628_015042_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01CE2F50 01949C70 00AF6920 017C6ED0 01E12CD0 0188DD50 034CB3F0 02EAEA00 039F9F00 02505080 037878C0
      037878C0 02C444A0 01A666F0 01755580 01CFFF40 02940070 01EF0020 03188030 0294C020 01DEA030 0131F020
      0131F020 03A90830 027D8C20 01434A30 01E2EF20 031398B0 034D2A70 0175DFA0 03CF3070 0228A840 033CFC60
      033CFC60 00A28250 02F3C370 038A22C0 024F33A0 0168AA70 01DCFF40 02994070 01EAF020 031F8830 02904C20
      02904C20 01D86A30 01345F20 03AE70B0 027948E0 0145EC90 03E71AD0 001497B0 020F6E30 03846C90 00465AD0
      00465AD0 026577B0 0357CC60 00FC2A50 02823F70 03C320C0 0222B0A0 0133E8F0 01AA1C80 00BF8960 037026E0
      037026E0 00C83590 02AC2F50 01FA38F0 01072480 0184B6C0 0146EDA0 03E59B70 021756C0 031CFDA0 004941B0
      004941B0 0236F0B0 032D88E0 00BB4C90 02E6EAD0 01959FB0 015F5060 03F0F850 00088470 000CC640 000AA560
      000AA560 0307FBE0 02420300 03630280 02D283C0 03BBC220 00662330 005532A0 027FABF0 03407E00 02E04100
      02E04100 03906180 012C28A0
     
