-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jul  5 02:15:26 2023 UTC
-- File 20230626_222714_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-06-26T22:27:17.000.000.000 to 2023-06-26T22:27:17.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230626_222714_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03FF02A0 000041F0 00003080 00001460 02001E50 01001170 018019C0 01401520 03E01FB0 02101060 01181850
      01181850 03941470 025E1E40 03B888B0 03326670 02AB5540 03FEFFE0 00018010 02014010 0101E010 03811010
      03811010 00419810 02615410 0151FE10 03FC8080 01016060 0381D050 00413870 0061A440 00517660 0279CD50
      0279CD50 01452BF0 01E7BE00 01146100 019E5180 00A8BCA0 017E7170 01C149C0 0121ED20 03B11BB0 02699660
      02699660 015D5D50 03F3F3F0 020A0A00 030F0F00 02888880 01E66660 038AAAA0 004FFFF0 00680000 005C0000
      005C0000 00720000 004B0000 006E8000 0059C000 00752000 004FB000 00343400 00171700 001C9C80 0012D2C0
      0012D2C0 001BBBA0 02166670 031D5540 0293FFE0 01DA0010 03370010 00AC8010 037D6000 0161E800 01D11C00
      01D11C00 01399200 01A55B00 0177F680 01CC0DC0 012A0B20 03BF0EB0 026089E0 0150CD10 03FC55C0 03013F90
      03013F90 0081A050 02C17070 03A1C840 02712C60 0149BA50 03ED6770 021BD4C0 03163EA0 009D21F0 0069D880
      0069D880 002E9A60 0239D750
     
