-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Jul  5 01:02:56 2023 UTC
-- File 20230626_202541_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-06-26T20:25:44.000.000.000 to 2023-06-26T20:25:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230626_202541_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01728CF0 01CBCA80 012E2FC0 01B93820 0365A430 02D77620 00DE6690 02B155D0 01E9FF30 011D00A0 039380F0
      039380F0 025A4080 037760C0 02CCD0A0 01AAB8F0 017FE480 00E00B60 03480760 00EC04D0 029A06B0 03D705E0
      03D705E0 003C8710 0222C490 0133A6D0 03AA75B0 027F4F60 0140E8D0 01F04E50 018434B0 01462EE0 03E53990
      03E53990 0017A550 021C77F0 03124C00 029B6A00 03D6DF00 023DB080 032368C0 03596E50 007AECB0 00479AE0
      00479AE0 02645790 01567C50 03FD4270 0203E340 030212E0 00831B90 02C29650 01A3DD70 00B919E0 0372CA80
      0372CA80 02CBAFC0 03AE7820 00794430 0045E620 02671530 03549FA0 00FED070 0081B840 00C16460 0350EB20
      0350EB20 007C4F50 024268F0 03635C80 02D2F2C0 03BB8BA0 00664E70 00556940 007FDDE0 02403310 01602A90
      01602A90 03E81FE0 020E0800 03090C00 028D8A00 03CB4F00 022EE880 03399CC0 02A552A0 01F7FBF0 010C0600
      010C0600 018A0500 00A783C0 027A2110 01473190 03E4A950 0016FDF0 001D8300 00134280 001AE3C0 00179220
      00179220 021C5B30 031276A0
     
