-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Jul  4 02:20:31 2023 UTC
-- File 20230626_062102_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-06-26T06:21:05.000.000.000 to 2023-06-26T06:21:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20230626_062102_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0174CCA0 03CEAAF0 0229FF80 033D0040 02A38060 01F24050 030B6070 028ED040 03C9B860 002D6450 023BD670
      023BD670 01931EA0 035A91F0 02F7D900 038C3580 024A2F40 036F38E0 00D8A490 02B4F6D0 01EE8DB0 0119CB60
      0119CB60 03CA9760 0217EE60 011C1950 039215F0 025B1F00 03769080 02CDD8C0 03AB34A0 007EAEF0 0041F980
      0041F980 00610540 0228C3F0 019E5100 01517980 01F9C540 010527E0 0387B410 00446E10 02665910 01557590
      01557590 03FFCF50 000028F0 00001E40 020008B0 03000CE0 00800A90 02C00FD0 01A00830 01700C20 03C80A30
      03C80A30 022C0F20 013A08B0 01A70CE0 03BA4540 0333B3F0 02AA6A00 03FF5F00 0200F080 030088C0 0280CCA0
      0280CCA0 01C0AAF0 0120FF80 01B08040 0168C060 03EE5020 000CBC10 020AE210 010F9310 03885A90 004C77D0
      004C77D0 026A4C30 035F6A20 00F0DF30 0088B0A0 02CCE8F0 01D54E40 029FF4B0 03D00EE0 00380990 02240D50
      02240D50 01360BF0 01AD0E00 017B8900 01C64D80 01256B40 01B7DEE0 03B618C0 03368A50 00ADCF70 00FB28C0
      00FB28C0 0086BCA0 02C5E2F0
     
