-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 28 18:03:10 2021 UTC
-- File 20210829_104910_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-29T10:49:13.000.000.000 to 2021-08-29T10:49:13.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210829_104910_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0179F400 01C50E00 01278900 01B44D80 016E6B40 01D95EE0 0335F190 025784A0 017C46F0 01C26580 01235740
      01235740 01B2FCE0 036B8290 00DE43D0 02B16230 03E9D320 001D3AB0 0209D3F0 01869D00 0145D380 01E73A40
      01E73A40 0114A760 039EF4D0 00518EB0 007949E0 0245ED10 01671B90 03D49650 001F6EB0 02086CF0 030C5A80
      030C5A80 028A77C0 03CF4C20 0028EA30 003C9F20 0222D0B0 0333B8E0 00AA6490 02FF56D0 00C07ED0 015020D0
      015020D0 03F830B0 020428E0 01063C90 038522D0 0047B3B0 00646A60 02565F50 017D70F0 01C3C880 00911660
      00911660 036CCEA0 00DAA9F0 00B7FD00 00EC0380 009A0240 00D70360 02BC82D0 01E2C3B0 0113A260 039A7350
      039A7350 002BA570 001F3BE0 0210A610 0118F510 03948F90 005EC850 0271AC70 03497A40 02EDC760 019B24D0
      019B24D0 0356B6B0 037EF6F0 0160C6C0 01D0A5A0 0338F770 02A48CC0 03F6CAA0 000DAFF0 000B7800 000EC400
      000EC400 0009A600 000D7500 0005E7C0 02038A10 01024F10 03836890 0042DCD0 0263B2B0 03526BE0 00FB5E10
      00FB5E10 0286F110 01C58990
     
