-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 28 10:30:16 2021 UTC
-- File 20210829_051020_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-29T05:10:23.000.000.000 to 2021-08-29T05:10:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210829_051020_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0077D450 024C3E70 036A2140 02DF31E0 01B0A910 0368FD90 00DC8350 02B2C2F0 03EBA380 021E7240 0388A5B0
      0388A5B0 024CF760 016A8CD0 03DFCAB0 02302FE0 01283810 03BC2410 00623610 02532D10 017ABB90 03E3F320
      03E3F320 00090550 020D87F0 030B4400 028EE600 03C99500 022D5F80 033BF040 02A60860 01F50C50 030F8A70
      030F8A70 014427A0 01F31A30 010A9720 038FDCB0 024832E0 016C2B90 03DA3E50 00372170 002CB1C0 003AE920
      003AE920 02279DB0 039A29B0 032B9EB0 02BE51E0 01E17910 0311C590 00992750 02D5B4F0 03BF6E80 0260D9C0
      0260D9C0 0350B520 00F8EFB0 02424C30 03B1B510 00696F90 025DD850 01733470 01CAAE40 012FF960 03B805D0
      03B805D0 00640730 005604A0 027D06F0 01A1C2C0 02B891D0 01E4D930 0116B5A0 039DEF70 025318C0 037A94A0
      037A94A0 00C7DEF0 00A43180 00F62940 008D3DE0 0365D180 016B9CA0 03DE52F0 02317B80 0329C640 02BD2560
      02BD2560 01E3B7D0 03126C30 029B5A20 01D6F730 013D8CA0 01D1A570 009CBBE0 02D2E610 01BB9510 03665F90
      03665F90 00D57050 02BFC870
     
