-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Dec 28 06:41:43 2021 UTC
-- File 20210829_023800_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2021-08-29T02:38:03.000.000.000 to 2021-08-29T02:38:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20210829_023800_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  038DE780 024B1440 03B74F30 03367450 0056A730 007DF4A0 02430EF0 03628980 02D3CD40 03BA2BE0 00673E10
      00673E10 0254A110 017EF190 03C18950 0010A6F0 000C7AC0 000A47A0 020F6470 0308D640 028CBD60 01CAE3D0
      01CAE3D0 032F9230 02B85B20 01E476B0 01164DE0 03CEB580 0114F7A0 039E8C70 0251CA40 03792F60 00C5B8D0
      00C5B8D0 02A764B0 03F4D6E0 000EBD90 0209E350 010D12F0 00C5CDC0 02539590 017A5F50 03C770F0 0224C880
      0224C880 0336ACC0 02ADFAA0 01FB07F0 01068400 0185C600 01472500 00F25BC0 0245BB10 01676690 03D4D5D0
      03D4D5D0 003EBF30 0021E0A0 023110F0 03299880 02BD54C0 03E3FEA0 001201F0 000D8080 0005A060 02077050
      02077050 0104C870 0186AC40 0145FA60 03E70750 001484F0 001EC680 0011A5C0 00197720 010AE650 01C7CAB0
      01C7CAB0 01242FE0 03B63810 006D2410 025BB610 01766D10 03CD5B90 002BF650 023E0D70 03210BC0 0358C710
      0358C710 027A5240 03477B60 00E4C6D0 0296A5B0 03DDF760 00330CD0 022A8AB0 033FCFE0 00A02810 02F03C10
      02F03C10 02C41100 01D30CC0
     
